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DC Field | Value | Language |
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dc.contributor.advisor | T, Laxminidhi. | - |
dc.contributor.author | Kaliyath, Yajunath. | - |
dc.date.accessioned | 2021-08-18T10:16:22Z | - |
dc.date.available | 2021-08-18T10:16:22Z | - |
dc.date.issued | 2020 | - |
dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/16853 | - |
dc.description.abstract | The Semiconductor IC industry is largely driven by the demands of digital IC design. One of the largely adopted practices is to scale down the technology node and operate on lower supply voltages. This led to faster devices with lower dynamic power consumption. The digital design has hugely benefitted from this. However, there are a large family of analog circuits which suffer performance degradation when operated on low supply voltages. Therefore, for such applications, it is common to operate analog designs on higher supply voltages i.e. in excess of 1 V. In addition, portable, battery powered electronic applications such as digital microphones, image sensors, data acquisition systems, hearing aids, etc., demand low power consumption to save on battery energy. Almost all analog designs have Operational Tranconductance Amplifier (OTA) as one of the integral blocks for realizing various functionalities. OTAs offering sufficiently high dc gain (as per the requirements of application) with lower power consumption will help in realizing the objective of low-power design. This research is an outcome of the efforts towards proposing an architecture for realizing an inverter-based OTA for switched capacitor based applications and prove its candidature in a couple of applications. The proposed OTA can achieve dc gain in excess of 100 dB and it can be made stable without the need for any explicit compensation scheme. A complete analysis of the OTA along with the design procedure has been presented. The proposed OTA has been designed in 1P6M UMC 180 nm standard CMOS process technology from UMC Technologies. The power supply for operation has been chosen to be 1.8 V. Two OTAs have been presented, one for biomedical applications and the other for audio applications. The OTA designed for biomedical applications offers a dc gain of 109.3 dB and a unity gain bandwidth (UGB) of 5.29 MHz at 81◦ phase margin with a capacitive load of 2.5 pF for a typical process corner at room temperature (27◦C). The quiescent current consumption of the OTA is 4.79 µA, resulting in a power consumption of 8.62 µW. The second OTA for audio applications offers a dc gain of 96.8 dB and a UGB of 19.4 MHz at 86◦phase margin with a capacitive load of 5 pF for a typical process corner at room temperature. This design draws a quiescent current (IQ) of 38.4 µA. The proposed OTA has been proved to be robust though Monte-Carlo simulations. It is also proved to be one among the best designs found in the literature, from the Figure-of-Merit commonly used for evaluating OTAs. To validate the worthiness of the proposed OTA, a 1-bit third order discrete time Delta Sigma Modulator has been designed for audio applications using the proposed inverter-based OTA. The three integrators of the feed-forward modulator use the proposed OTA as their main block. The classical modulator, without the use of any dedicated improvement scheme, achieves a peak SNR of 91.2 dB and peak SNDR of 87.7 dB with a dynamic range of 89.9 dB. The modulator consumes 570.6 µW operating on 1.8 V supply. The Figure-of-Merit proves that the modulator is a fitting candidate among similar modulators found in the literature. Extending further, a Class D audio amplifier has been designed. The class-D amplifier is targeted for 8 Ω speaker load. The on-chip amplifier adopts the delta-sigma-modulation scheme for achieving audio-grade performance. The power-stage has been designed to have 97.5% efficiency. The class-D amplifier, without any additional scheme for improving the performance, offered a dynamic range of 89.7 dB along with a best THD+N of -85.8,dB for 8 Ω speaker load delivering a maximum power of 100 mW while operating on 1.8 V supply. The efficiency of the amplifier is 92.3% at the peak output power. The amplifier is found to be one of the best in its class. | en_US |
dc.language.iso | en | en_US |
dc.publisher | National Institute of Technology Karnataka, Surathkal | en_US |
dc.subject | Department of Electronics and Communication Engineering | en_US |
dc.subject | Inverter-based OTA | en_US |
dc.subject | high gain | en_US |
dc.subject | cascoding | en_US |
dc.subject | gain-boosting | en_US |
dc.subject | switched capacitor integrator | en_US |
dc.subject | delta sigma modulator | en_US |
dc.subject | feed-forward topology | en_US |
dc.subject | audio applications | en_US |
dc.subject | class D amplifier | en_US |
dc.title | Design of an Inverter-Based High Gain OTA, and its Application in Delta Sigma Modulators and Class-D Amplifiers for Audio Applications | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | 1. Ph.D Theses |
Files in This Item:
File | Description | Size | Format | |
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121181EC12F02.pdf | 5.53 MB | Adobe PDF | View/Open |
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