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https://idr.l2.nitk.ac.in/jspui/handle/123456789/15020Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sathwik G.S. | |
| dc.contributor.author | Acharya B.K. | |
| dc.contributor.author | Ali B. | |
| dc.contributor.author | Deepu S.P. | |
| dc.contributor.author | David S. | |
| dc.date.accessioned | 2021-05-05T10:16:13Z | - |
| dc.date.available | 2021-05-05T10:16:13Z | - |
| dc.date.issued | 2020 | |
| dc.identifier.citation | Proceedings of 2020 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2020 , Vol. , , p. 232 - 235 | en_US |
| dc.identifier.uri | https://doi.org/10.1109/APCCAS50809.2020.9301667 | |
| dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/15020 | - |
| dc.description.abstract | In this paper, hardware design and implementation to realize the effect of 3D sound with time-varying FIR filters are presented. 3D sound is a type of audio that encapsulates and recreates the effect identical to the way our ears normally experience. The spatial location of sound results in its three dimensional aspect. To synthesize it from a stereo recording, Head Related Transfer Functions (HRTFs), which describe the spectral behaviour of sounds coming from a particular direction are used. FIR filters derived from this transfer function are applied to the incoming sound, yielding spatial effect. The system was implemented using 180 nm technology libraries targeting an Application Specific Integrated Circuit (ASIC) and the functionality was validated in real-time on FPGA. © 2020 IEEE. | en_US |
| dc.title | Real-Time Hardware Implementation of 3D Sound Synthesis | en_US |
| dc.type | Conference Paper | en_US |
| Appears in Collections: | 2. Conference Papers | |
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