Low power log-domain filter

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DC Field	Value	Language
dc.contributor.author	Patii A.
dc.contributor.author	Muhammed M.
dc.contributor.author	Rao H.G.
dc.contributor.author	Rekha S.
dc.date.accessioned	2021-05-05T10:16:00Z	-
dc.date.available	2021-05-05T10:16:00Z	-
dc.date.issued	2019
dc.identifier.citation	2019 IEEE 16th India Council International Conference, INDICON 2019 - Symposium Proceedings , Vol. , , p. -	en_US
dc.identifier.uri	https://doi.org/10.1109/INDICON47234.2019.9029106
dc.identifier.uri	http://idr.nitk.ac.in/jspui/handle/123456789/14919	-
dc.description.abstract	This paper presents a second order low-pass filter employing the log-domain technique for low-voltage, low- power biomedical applications. The filter design is based on the dynamic translinear principle which exploits the non-linear current-voltage relationship of MOS transistors operating in sub- threshold region. The filter, designed in UMC 180 nm CMOS technology, operates with a 0.9 V supply voltage. It consumes a power of 45 nW for a cutoff frequency of 100 Hz. The dynamic range (DR) and figure of merit (FoM) of the filter are 55.6 dB and 61.3 fJ respectively. The DR and FoM of the filter is better than many designs found in the literature. © 2019 IEEE.	en_US
dc.title	Low power log-domain filter	en_US
dc.type	Conference Paper	en_US
Appears in Collections:	2. Conference Papers

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